The continuous trend of downscaling for complementary-metal-oxide-semiconductor (CMOS) technology is a great challenge and is driving industry to new and alternative architectures which should be able to address the difficult questions of voltage scaling, short channel effects, increasing power consumption, mobility, and the like.
A possible alternative to planar, one-dimensional (1D) CMOS technology is the introduction a two-dimensional (2D) and even three-dimensional (3D) CMOS technology such as for example the introduction of nanowire field effect transistors (NW-FET). In IEEE Transactions on Electron. Devices, Vol. 55, no. 11, November 2008, p. 2859-2976, limitations and applications are disclosed for NW-FETs.